Prof. Ami Patel

Prof. Ami Patel

Ph.D. (Pursuing), M.Tech, B.E

Area of Interest

Back-end VLSI design, Basic electronics, Digital Electronics, Microprocessor, Data Science and Machine learning

Qualification
Majors Degrees

  •  Ph.D. (Pursuing) in Quantum Computing 

  • M. Tech in VLSI Design- Nirma University (2007-2009)

  • B.E. in Electronics and Communication Engineering -GU (1999-2003)


Online Certified Courses


  • Programming for Everybody (Getting Started with Python)- University of Michigan Sep-2020

  • Introduction to Electronics-COURSERA Georgia Institute of Technology June -2020

  • Basic Electrical Circuits, IIT-Madras NPTE, Dec-2014

Academic

  • Total academic experience is of 20 years.

Graduate Level


  •  C Programming, Digital Electronics, Integrated Electronics, VLSI Design and Technology, Electronics and Communication, Digital Communication, Power Electronics, Microprocessor and Interfacing, Advanced Microprocessor, Microcontroller 8051, Elements of Electrical Engineering, Fundamentals of Computer Science using Python – I, Fundamentals of Computer Science using Python - II


Postgraduate Level


  • Statistical Signal Analysis, VLSI Design

Seminars/Workshop Attended


  • “Communication and Navigational satellite Technology” At LJIET, IEEE AP/MTT Joint Chapter, 2013

  • “Advanced Signal and Image Processing” At Nirma Institute of Tech-27th Dec,2010- 1st Jan, 2011.

  • International Conference on Emerging & Futuristic System and Technology, Alwar- April 2009. Presented Paper “Low power Four Quadrant Analog multiplier using triode-MOSFET” 

  • Intensive Workshop on “High Speed Semiconductor Device”. At DA-IICT, Gandhinagar. – March 2009.

  • “Nanotechnology: Today and Tomorrow”. At Nirma Institute of Tech. –Jan 2009.

  • International Conference on VLSI and Communication, Kottayam- April 2009. Presented Paper “Design and simulation of low power Analog multiplier with different architectures using Sub-micron technology.”

  • National Conference on Current Trends and Technology, Ahmedabad- November 2008. Presented Paper “Low power Analog multiplier using 130nm CMOS technology”


  • Published “Design and simulation of low power Analog multiplier with different architectures using Sub-micron technology.” in International Journal on Information and Communication Technology. ISSN 0973-5836 by Serial publications.

  • “Intrusion Detection System: A Review” in INTERNATIONAL JOURNAL OF ENGINEERING RESEARCH & TECHNOLOGY. ISSN 2278-0181

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